Analog Mixed-Signal Verification Engineer
Job Summary
As an AMS Verification Engineer, you will join a team working on complex Analog Mixed-Signal (AMS) ASIC products. You will contribute to the verification of AMS IPs, top-level verification, and system-level modeling. This role offers the opportunity to develop strong expertise in verification methodologies within challenging semiconductor projects.
Responsibilities
- Contribute to AMS IP and top-level verification
- Perform simulation debugging and coverage analysis
- Develop AMS models (wreal, Verilog-AMS, SystemVerilog RNM)
- Integrate models into UVM verification environments
- Collaborate with design and architecture teams
Required Skills
- AMS verification principles
- Mixed-signal modeling (wreal/RNM)
- SystemVerilog / UVM
- Knowledge of simulation tools (Cadence/Synopsys)
- Understanding of power management/DC-DC
Job Details
Your main responsibilities:
AMS Verification
- Contribute to the verification of AMS IPs at IP and top level
- Support the execution of verification plans for DC/DC converter IPs and their integration
- Participate in coverage analysis and verification closure activities
- Help debug and analyze simulation issues
System-Level AMS Verification
- Contribute to the development and maintenance of AMS Top Cell verification environments
- Help verify consistency between behavioral models and transistor-level implementations
- Participate in the validation of analog/digital interactions at system level
Modeling and Abstraction
- Contribute to AMS model development using wreal (Real Number Modeling)
- Participate in model creation using Verilog-AMS and SystemVerilog RNM
- Learn to structure models based on physical quantities such as voltage, current, and impedance
Digital Verification Integration
- Contribute to SystemVerilog / UVM verification environments
- Support the integration of AMS models into digital verification testbenches
- Participate in regression execution, test development, and debug
Protocols and Interfaces
- Contribute to the modeling and verification of interfaces such as PSI5
Team Collaboration
- Work closely with design, architecture, validation, and verification teams
- Participate in design and verification reviews
- Learn from experienced engineers and progressively grow your autonomy
Profile we are looking for:
Education: Master’s degree or Engineering degree in Electronics, Microelectronics, or Embedded Systems
Experience: Minimum 1 year of experience (including internships or first professional experience) in AMS verification, ASIC design, or mixed-signal environments. A first exposure to semiconductor verification methodologies is appreciated.
Technical skills:
- Knowledge of AMS verification principles
- First experience or academic exposure to mixed-signal modeling
- Familiarity with wreal, Verilog-AMS, or SystemVerilog RNM
- Basic understanding of physical quantities such as voltage, current, and impedance
- Knowledge of SystemVerilog / UVM
- Exposure to DC/DC converters or power management concepts
- Familiarity with PSI5 or similar interfaces
- Knowledge of Cadence, Synopsys, or equivalent AMS simulation tools
Soft skills:
- Analytical mindset and strong curiosity
- Eagerness to learn and grow technically
- Good communication and teamwork skills
- Autonomous, rigorous, and quality-oriented
- Interest in complex semiconductor systems